http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
Präparationstechniken für die Fehleranalyse an integrierten Halbleiterschaltungen. Inglés
Purpose and importance of preparatory semiconductor analysis -- Opening the package. Chip insulation -- Wet chemical etching procedures for removing layers of the chip structure -- Crystallographic etching in the silicon -- Dry etching the plasma -- Microsectioning technology, metallography -- Appendix 1: advice on health and safety at work -- Appendix 2: list of manufacturers and suppliers
Friedrich Beck ; translated by Stephen S. Wilson.
Incluye bibliografía e índice analítico.
Wiley series in quality and reliability engineering