rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Integrated circuit failure analysis
    sub title: a guide to preparation techniques
  title info:
    title: Präparationstechniken für die Fehleranalyse an integrierten Halbleiterschaltungen. Inglés
  name:
    name part: Beck, Friedrich.
    role:
      role term: creator
  type of resource: text
  origin info:
    place:
      place term: enk
    place:
      place term: Chichester
    place:
      place term: New York
    publisher: Wiley
    date issued: c1998
    date issued: 1998
    issuance: monographic
  language:
    language term: eng
  language:
    language term: ger
  physical description:
    form: print
    extent: xiv, 173 p. : il. ; 24 cm.
  table of contents: Purpose and importance of preparatory semiconductor analysis -- Opening the package. Chip insulation -- Wet chemical etching procedures for removing layers of the chip structure -- Crystallographic etching in the silicon -- Dry etching the plasma -- Microsectioning technology, metallography -- Appendix 1: advice on health and safety at work -- Appendix 2: list of manufacturers and suppliers
  target audience: specialized
  note: Friedrich Beck ; translated by Stephen S. Wilson.
  note: Incluye bibliografía e índice analítico.
  subject:
    topic: Circuitos integrados
  subject:
    topic: SEMICONDUCTORES
  subject:
    topic: Fallos
  subject:
    topic: Ensayos
  subject:
    topic: Electronica
    topic: Confiabilidad
  classification: 621.3815
  classification: 621.315.59
  related item:
    title info:
      title: Wiley series in quality and reliability engineering
  identifier: 0471974013
  record info:
    record content source: DLC
    record creation date: 970304
    record change date: 20221207101040.0
    record identifier: 1179789
    language of cataloging:
      language term: spa